MI
- Employment type
- Full-time · On-site
- Posted
- November 14, 2026
Hiring confidence: Sparse posting · 22/100
This posting is missing most of the signals we look for, or shows patterns common to listings that are not actively being filled. Check with the employer before applying. How this is scored
Job Overview
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KEY RESPONSIBILITIES: Perform physical implementation of complex ASICs, SoCs, and IP blocks from synthesis through final tapeout. Execute floorplanning, power planning, placement, clock tree synthesis (CTS), and routing. Drive timing closure through setup/hold optimization, timing analysis, and ECO implementation. Perform Static Timing Analysis (STA) across multiple modes and corners (MMMC). Analyze and optimize power, performance, and area (PPA) tradeoffs. Conduct signal integrity, crosstalk, …
This role is based in San Diego, San Diego County. Mindlance is hiring for this full-time position through Jobily, where you can check how well your resume matches the posting before you apply.
About the Company
MI